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銆�銆�閫欎箞楂樼殑閲囨ǎ鐜囧皪(du矛)AD鑺墖瑕佹眰寰堥珮銆傞�欓噷閬哥敤鐨勬槸AD9883A,瀹冨叿鏈夐噰妯ｇ簿搴︾偤8bit鐨�3璺�氶亾锛屾渶楂橀噰妯ｇ巼鐐�140Msps,300MB鐨勬ā鎿付瀵紝鍙渶楂橀噰妯ｅ垎杈ㄧ巼鐐�1280脳1024锛屽埛鏂扮巼鐐�75Hz鐨勮闋讳俊铏�(h脿o)銆侫D9883A鑳藉閲囬泦澶氱óVGA鍦栧儚鏍煎紡锛屼絾鍗讳笉鑳借嚜鍕�(d貌ng)妾㈡脯鍦栧儚鏍煎紡锛屽繀闋堟牴鎿�(j霉)瀵�(sh铆)闅涚殑鎸囨(bi膩o)灏�(du矛)鍏�(n猫i)閮ㄥ瘎瀛樺櫒閫�(j矛n)琛屽垵濮嬪寲锛屽垵濮嬪寲閬庣▼閫氶亷FPGA涓�鍊�(g猫)I2C妯″渚濋潬AD9883鐨凷DA鍜孲CL鍏╁紩鑵抽��(j矛n)琛岋紝鏅�(sh铆)搴忕鍚圛2C绺界窔鏅�(sh铆)搴忔(bi膩o)婧�(zh菙n)銆傚湒2鐐洪噸瑕佸瘎瀛樺櫒鐨勮ō(sh猫)缃�硷紝鍏朵粬鏈ō(sh猫)缃殑鍧囧彇榛樿獚(r猫n)鍊笺��
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